1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly relates to a semiconductor device including sense amplifiers that amplify minimal data read from memory cells.
2. Description of Related Art
A semiconductor memory such as a DRAM (Dynamic Random Access Memory) includes sense amplifiers that amplify minimal data read from memory cells. In the DRAM, for example, the sense amplifiers perform amplification of read data during a read operation and also perform a data restore operation for unselected memory cells during a read operation and a write operation.
That is, either during the read operation or during the write operation, when a predetermined word line is selected based on a row address, all memory cells connected to the word line are electrically connected to corresponding sense amplifiers via bit lines, respectively. This enables to amplify data held in these memory cells and restore data in memory cells having been destroyed or reduced in amounts by outflow or inflow of electric charges due to the selection of the word line. An output of a sense amplifier selected by a column address is then outputted outside during a read operation, and write data is overwritten to a sense amplifier selected by a column address during a write operation.
In this manner, arbitrary write data is overwritten to a sense amplifier that is already in an active state during the write operation, and therefore the sense amplifier in the active state needs to be forcibly inverted when a logical level before the overwriting and a logical level of the write data are opposite to each other. Accordingly, the overwriting of data requires more time and power consumption increases as compared to a case where a logical level before overwriting and a logical level of write data are the same.
As a method for solving this problem, Japanese Patent Application Laid-open No. H5-36277 describes a method that enables to selectively inactivate a sense amplifier specified by a column address during a write operation. According to this method, the need to forcibly invert the sense amplifier can be eliminated, which enables to quickly perform overwriting of data and reduce power consumption regardless of a relation between a logical level before overwriting and a logical level of write data. Because unselected sense amplifiers can be activated as usual, a restore operation can be also performed correctly.
However, in the method described in Japanese Patent Application Laid-open No. H5-36277, a sense amplifier specified by a column address needs to be selectively inactivated during a write operation, and therefore a control circuit for inactivating a sense amplifier needs to be provided for each of the sense amplifiers. This greatly increases a chip area.
This problem occurs not only in DRAMs but occurs generally in semiconductor devices that need to forcibly invert sense amplifiers during a write operation. That is, this problem occurs also in semiconductor memories other than DRAMs and semiconductor devices that include such a semiconductor memory in a part thereof.